Many methods of converting an analog signal to a digital signal are known, in particular the parallel method, the weighing method and the counting method.
In the parallel method, the input voltage is compared simultaneously with n reference voltages, and it is determined which of the two reference voltages the input voltage falls between. This gives a digital output signal proportional to the input voltage, and thus to a certain number, in one step. But this method is very expensive, since a comparator is needed for every possible number. A measuring range of 0 to 100 in steps of one thus requires n=100 comparators.
In the weighing method, the whole result is not achieved in one step. Rather, only one digit of the number is found (as a binary number). Thus, one starts with the highest digit and finds out whether the input voltage is greater or less than the reference voltage for the highest digit. If it is greater, the highest digit is set at one, and the reference voltage is subtracted. The remainder is then compared with the next-lower digit, and so on. This method thus takes as many steps as the number has digits, and just as many reference voltages.
The simplest method is the counting method. This method counts how many times the reference voltage with the lowest digit must be added to obtain the input voltage. The number of steps is the answer.
The method of converting an analog signal to a digital signal described at the beginning is a special type of counting method, namely the so-called dual slope method, which has the advantage that a very large solution can be obtained at a relatively small expense.
A known circuit arrangement for carrying out the dual slope counting method is shown in FIG. 1. That circuit includes a functionally necessary integrator 1 and a comparator 2. There is also a summation amplifier 3 with a digital-to-analog (D/A) converter 4, whose input derives from a microprocessor (not shown) and whose output constitutes a reference voltage U.sub.ref. There is also a 10:1 divider 5, whose switches can be closed selectively, to increase the dynamic range and a .+-.amplifier 6, so that the comparator 2 is always driven unilaterally, and so the influence of offset and reaction times as an additive portion can be kept as constant as possible.
In the resting state of the FIG. 1 circuit, switch S.sub.1 is open and switch S.sub.3 is closed, and the D/A converter 4 is not driven and the integrator voltage U.sub.int at the output of integrator 1 is zero. When measurement starts, a counter (not shown) on the output side, which can be part of microprocessor, is reset, switch S.sub.3 is open, and switch S.sub.1 is closed. In this way, the input voltage U.sub.e is integrated to a certain integrator voltage U.sub.int over a given integration time t.sub.auf as measured with the counter (not shown). At the end of the integration time t.sub.auf, the integrator voltage U.sub.int equals: ##EQU1##
After completing the integration to the integrator voltage U.sub.int in the known time interval t.sub.auf, there follows an integration down to zero voltage. For this, the integrator voltage is decremented by an integration of the reference voltage U.sub.ref provided by the D/A converter 4. The time required to decrement the integrator voltage U.sub.int down to zero volts is t.sub.ab. This time is determined by the comparator 2 and the counter (not shown). Using comparator 2 and the counter (not shown), the decrement time t.sub.ab is determined as follows: ##EQU2##
From Equation 2, the input voltage U.sub.e is found as follows: ##EQU3##
FIG. 2 shows an input voltage Ue to be converted to a digital output signal by the FIG. 1 circuit and FIG. 3 shows integrator voltages U.sub.int occurring in that circuit. Note that in FIG. 3, the integrator voltage becomes negative if the time during which that voltage is decremented by U.sub.ref is greater than t.sub.ab.
The advantage of the dual slope method is that neither the elementary or clock frequency, which must in any case be stable, nor the integration time-constant enter into the result. Incidentally, the momentary value of the input voltage does not enter into the result either, only its average over the integration time. Thus, the higher the frequency, the more the alternating currents are attenuated. Alternating currents whose frequencies are equal to a whole number multiple of the reciprocal value of the integration time are completely suppressed. Thus, the influence of the ripple voltage of the line frequency is eliminated by appropriate selection of the integration time.
The following disadvantages are inherent in the known dual slope counting method described thus far:
a) different input voltages lead to different modulations of the integrator (see waveforms 1 and 2 in FIG. 3);
b) a small modulation of the integrator means the saturation strength of the integrator is low;
c) small modulations of the integrator lead automatically to the problem of compensating for the direct current, so that the integrator is always driven around zero;
d) the D/A converter 4 produces different reference voltages so that linear deviations in the D/A converter enter directly into the results. Accordingly, a D/A converter with high resolution and good linearity must be used;
e) a high-precision 10:1 divider 5 is necessary to expand the dynamic range; and
f) the .+-. amplifier 6 is necessary so that the comparator can always be driven unilaterally so that the influence of offset and reaction times can be kept as constant as possible as an additive portion.
Accordingly, it is among the objects of the invention to design and develop a method and means of converting an analog signal to a digital signal using the dual slope type of counting method, so that the method can be practiced with a simpler circuit arrangement and achieve better results.